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A list of all the posts and pages found on the site. For you robots out there is an XML version available for digesting as well.
Pages
Biography
About me
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Posts
awards
NTU Presidential Award × 2 semesters
The award is given to students ranking within the top 5% of their class.
TSMC-NTU Scholarship × 2 semesters
The scholarship is sponsored by the TSMC-NTU Joint Reasearch Center.
GIEE Scholarship × 4 semesters
The scholarship is granted by the Graduate Institute of Electroncis Engineering (GIEE).
1st place in the Formosa Grand Challenge "Taking with AI"
This is a nationwide ML competition hosted by Taiwan Ministry of Science and Technology.
1st place in the 2019 ICCAD CADathlon
The CADathlon is a challenging programming competition co-located with ICCAD.
1st place in the 2020 CIEE Youth Thesis Award
The CIEE Thesis award is one of the most prestigious awards for graduate students in Taiwan.
2020 Lam Research Master’s Thesis Excellence Award at NTU
The Lam Research Awards are presented to students with outstanding theses in STEM field.
2020 IICM Master’s Thesis Excellence Award
The IICM Thesis Awards are given to grad students that had done execellent work in the field of computing machinary.
2nd place in the IWLS 2021 Programming Contest
This is an international contest organized by the IWLS committee.
projects
Deep Neural Network using Stochastic Computing
This is one of my undergraduate course project. 
Formosa Grand Challenge “Talking with AI”
This is a nationwide ML competition hosted by Taiwan Ministry of Science and Technology.
Time-Frame Folding: Back to the Sequentiality
The related paper was accepted by ICCAD 2019. 
Time Multiplexing via Circuit Folding
The related paper was accepted by DAC 2020. 
Machine Learning + Logic Synthesis
This is the topic of the IWLS 2020 Programming Contest. 
Compatible Equivalence Checking of X-valued Circuits
The project originated from the problem A of the ICCAD 2020 CAD Contest. 
Machine Learning + Logic Synthesis (II)
This is the topic of the IWLS 2021 Programming Contest. 
publications
Time-Frame Folding: Back to the Sequentiality
Published in Proceedings of the International Conference on Computer-Aided Design (ICCAD), 2019
Time-frame folding is formulated as the reverse operation of time-frame expansion. This method has the ability in circuit size compaction and applications in logic synthesis domains.
Recommended citation: P.-C. Chien and J.-H. R. Jiang, "Time-frame Folding: Back to the Sequentiality," in Proc. ICCAD, 2019.
Circuit Folding: From Combinational to Sequential Circuits
Published in National Taiwan University Library, 2020
This is my Master’s Thesis and is the extended research of the ICCAD 2019 paper and DAC 2020 paper.
Recommended citation: P.-C. Chien, "Circuit Folding: From Combinational to Sequential Circuits," Master's Thesis, National Taiwan University, 2020.
Time Multiplexing via Circuit Folding
Published in Proceedings of the Design Automation Conference (DAC), 2020
The structural and functional circuit folding methods are proposed to address time multiplexing in multi-FPGA system. These methods may potentially help alleviate the bottleneck of limited inter-chip I/O bandwidth.
Recommended citation: P.-C. Chien and J.-H. R. Jiang, "Time Multiplexing via Circuit Folding," in Proc. DAC, 2020.
Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization
Published in Proceedings of the Design, Automation and Test in Europe Conference (DATE), 2021
This paper presents learning incompletely-specified functions based on the results of a competition conducted at IWLS 2020.
Recommended citation: S. Rai et al., "Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization," in Proc. DATE, 2021.
Compatible Equivalence Checking of X-Valued Circuits
Published in Proceedings of the International Conference on Computer-Aided Design (ICCAD), 2021
This paper presents our winning method of the 2020 ICCAD CAD Contest based on X-value preserving dual-rail encoding and incremental identification of compatible equivalence relation.
Recommended citation: Y.-N. Wang, Y.-R. Luo, P.-C. Chien, P.-L. Wang, H.-R. Wang, W.-H. Lin, J.-H. R. Jiang and C.-Y. R. Huang, "Compatible Equivalence Checking of X-Valued Circuits," in Proc. ICCAD, 2021. To appear.